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30 V, High Speed, Low Noise, Low Bias Current, JFET Operational Amplifier ADA4627-1/ADA4637-1
FEATURES
Low offset voltage: 200 V maximum Offset drift: 1 V/C typical Very low input bias current: 5 pA maximum Extended temperature range: -40C to +125C 5 V to 15 V dual supply ADA4627-1 GBW: 19 MHz ADA4637-1 GBW: 79 MHz Voltage noise: 6.1 nV/Hz at 1 kHz ADA4627-1 slew rate: 82 V/s ADA4637-1 slew rate: 170 V/s High gain: 120 dB typical High CMRR: 116 dB typical High PSRR: 112 dB typical
PIN CONFIGURATIONS
NULL 1 -IN 2 +IN 3 V- 4
8
NC V+ OUT
07559-001 07559-103
ADA4627-1
TOP VIEW (Not to Scale)
7 6 5
NULL
NC = NO CONNECT
Figure 1. 8-Lead SOIC_N (R-8)
NULL 1 -IN 2 +IN 3 V- 4
8
NC V+ OUT NULL
ADA4637-1
TOP VIEW (Not to Scale)
7 6 5
NC = NO CONNECT
APPLICATIONS
High impedance sensors Photodiode amplifier Precision instrumentation Phase-locked loop filters High end, professional audio DAC output amplifier ATE Medical
NC 1 -IN 2 +IN 3 V- 4
Figure 2. 8-Lead SOIC_N (R-8)
PIN 1 INDICATOR
8 NC 7 V+ 6 OUT 5 NC
ADA4627-1
TOP VIEW (Not toScale)
NOTES 1. NC = NO CONNECT. 2. IT IS RECOMMENDED THAT THE EXPOSED PAD BE CONNECTED TO V-.
Figure 3. 8-Lead LFCSP_VD (CP-8-2)
GENERAL DESCRIPTION
The ADA4627-1/ADA4637-1 are wide bandwidth precision amplifiers featuring low noise, very low offset, drift, and bias current. The parts operate from 5 V to 15 V dual supply. The ADA4627-1/ADA4637-1 provide benefits previously found in few amplifiers. These amplifiers combine the best specifications of precision dc and high speed ac op amps. The ADA4637-1 is a decompensated version of the ADA4627-1 and is stable at a noise gain of 5 or greater. With a typical offset voltage of only 70 V, drift of less than 1 V/C, and noise of only 0.86 V p-p (0.1 Hz to 10 Hz), the ADA4627-1/ADA4637-1 are suited for applications where error sources cannot be tolerated. Table 1. High Speed Precision Op Amps
Supply Single Dual Quad 5 V Low Cost AD8615 AD8616 AD8618 5V AD8651 AD8652 26 V Low Power AD8610 AD8620 30 V Low Cost AD8510 AD8512 AD8513 30 V ADA4627-1/ADA4637-1
The ADA4627-1/ADA4637-1 are specified for both the industrial temperature range of -25C to +85C and the extended industrial temperature range of -40C to +125C. The ADA4627-1 is available in tiny 8-lead LFCSP and 8-lead SOIC packages, and the ADA4637-1 is available in tiny 8-lead SOIC packages. The ADA4627-1/ADA4637-1 are members of a growing series of high speed, precision op amps offered by Analog Devices, Inc. (see Table 1).
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. www.analog.com Tel: 781.329.4700 Fax: 781.461.3113 (c)2009-2010 Analog Devices, Inc. All rights reserved.
07559-002
ADA4627-1/ADA4637-1 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications ....................................................................................... 1 Pin Configurations ........................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Electrical Characteristics--30 V Operation ............................. 3 Absolute Maximum Ratings ............................................................ 5 Thermal Resistance ...................................................................... 5 ESD Caution .................................................................................. 5 Typical Performance Characteristics ............................................. 6 Theory of Operation ...................................................................... 14 Input Voltage Range ................................................................... 14 Input Offset Voltage Adjust Range........................................... 14 Input Bias Current ...................................................................... 14 Noise Considerations ................................................................. 14 THD + N Measurements ........................................................... 15 Printed Circuit Board Layout, Bias Current, and Bypassing 15 Output Phase Reversal ............................................................... 15 Decompensated Op Amps ........................................................ 16 Driving Capacitive Loads .......................................................... 16 Outline Dimensions ....................................................................... 17 Ordering Guide .......................................................................... 18
REVISION HISTORY
7/10--Rev. B to Rev. C Added ADA4637-1 ............................................................. Universal Added Figure 2; Renumbered Sequentially .................................. 1 Changes to Table 2 ............................................................................ 3 Change to Table 3 ............................................................................. 5 Changes to Typical Performance Characteristics Section ........... 6 Updated Outline Dimensions ....................................................... 17 Changes to Ordering Guide .......................................................... 18 10/09--Rev. A to Rev. B Changes to Figure 2 .......................................................................... 1 9/09--Rev. 0 to Rev. A Changes to General Description Section .......................................1 Changes to Table 2.............................................................................3 Updated Outline Dimensions ....................................................... 14 Changes to Ordering Guide .......................................................... 15 7/09--Revision 0: Initial Version
Rev. C | Page 2 of 20
ADA4627-1/ADA4637-1 SPECIFICATIONS
ELECTRICAL CHARACTERISTICS--30 V OPERATION
VSY = 15 V, VCM = 0 V, TA = 25C, unless otherwise noted. Table 2.
Parameter INPUT CHARACTERISTICS Offset Voltage 1 Symbol VOS -40C TA +85C -40C TA +125C -40C TA +125C VSY = 4.5 V to 18 V -40C TA +125C Input Bias Current2 IB -40C TA +85C -40C TA +125C Input Offset Current IOS -40C TA +85C -40C TA +125C NOISE PERFORMANCE Voltage Noise Density en f = 10 Hz f = 100 Hz f = 1 kHz f = 10 kHz 0.1 Hz to 10 Hz f = 100 Hz 0.1 Hz to 10 Hz 16.5 7.9 6.1 4.8 0.7 1.6 30 10 8 7 -11 -10.5 106 98 112 110 102 40 40 120 116 +11 +10.5 -11 -10.5 100 97 106 104 100 40 40 120 dB dB dB dB V/s V/s V/s V/s 110 0.5 106 101 1 5 0.5 2 5 0.5 2 40 20 8 6 1.6 Test Conditions/Comments Min B Grade Typ 70 Max 200 350 400 2 103 99 1 5 0.5 2 5 0.5 2 40 20 8 6 1.6 Min A Grade Typ 120 Max 300 410 660 3 Unit V V V V/C dB dB pA nA nA pA nA nA nV/Hz nV/Hz nV/Hz nV/Hz V p-p fA/Hz fA p-p T pF pF +11 +10.5 V V dB
Offset Voltage Drift, Average Power Supply Rejection Ratio
VOS/T PSRR
1 112
1 108
0.5
Voltage Noise Current Noise Density Current Noise Input Resistance Input Capacitance, Differential Mode Input Capacitance, Common Mode Input Voltage Range
en p-p in in p-p RIN CINDM CINCM IVR
16.5 7.9 6.1 4.8 0.7 2.5 48 10 8 7
-40C TA +125C Common-Mode Rejection Ratio CMRR TA = 25C, VCM = -11 V to +11 V -40C TA +125C, VCM = -10.5 V to +10.5 V RL = 1 k, VO = -10 V to +10 V -40 TA +85C -40 TA +125C 10 V step, RL = 1 k, CL = 100 pF, AV = +1 10 V step, RL = 1 k, CL = 100 pF, Rs = Rf = 1 k, AV = -1 10 V out, Cf = 4.8 pF, AV = -4 10 V out, Cf = 4.8 pF, AV = +5
Large Signal Voltage Gain
AVO
DYNAMIC PERFORMANCE Slew Rate ADA4627-1
SR SR
56/783 82/843 170 170
56/783 82/843 170 170
Slew Rate ADA4637-1
SR SR
Rev. C | Page 3 of 20
ADA4627-1/ADA4637-1
Parameter Settling Time to 0.01% ADA4627-1 ADA4637-1 Settling Time to 0.1% ADA4627-1 ADA4637-1 Gain Bandwidth Product ADA4627-1 ADA4637-1 Phase Margin ADA4627-1 ADA4637-1 Total Harmonic Distortion + Noise POWER SUPPLY Supply Current per Amplifier OUTPUT CHARACTERISTICS Output Voltage High GBP RL = 1 k, CL = 20 pF, AV = 1 AV = 10 M RL = 1 k, CL = 20 pF, AV = 1 AV = 10 f = 1 kHz, AV = 1, ADA4627-1 72 85 0.000045 72 85 0.000045 Degrees % 164 19 79.9 164 19 79.9 MHz tS VIN = 10 V step, CL = 35 pF, RL = +1 k, AV = -1 VOUT = 10 V step, CL = 35 pF, RL = +1 k, AV = -4 450 200 450 200 ns ns Symbol tS Test Conditions/Comments VIN = 10 V step, CL = 35 pF, RL = +1 k, AV = -1 VIN = 10 V step, CL = 35 pF, RL = +1 k, AV = -4 Min B Grade Typ 550 300 Max Min A Grade Typ 550 300 Max Unit ns ns
THD + N
ISY
IO = 0 mA -40C TA +125C
7.0
7.5 7.8
7.0
7.5 7.8
mA mA V V V V V V mA mA
VOH
Output Voltage Low
VOL
Output Current Short-Circuit Current Closed-Loop Output Impedance
1 2
IOUT ISC ZOUT
RL = 1 k to VCM -40C TA +85C -40C TA +125C RL = 1 k to VCM -40C TA +85C -40C TA +125C VO = 10 V TA = 25C f = 1 MHz, AV = -100
12.0 11.8 11.7
12.3
12.0 11.8 11.7 -12.3 -12.1 -12.0
12.3
-12.7
-12.7
-12.3 -12.1 -12.0
45 +70/-55 41
45 +70/-55 41
VOS is measured fully warmed up. Tested/extrapolated from 125C. 3 Rising/falling. 4 Not tested. Guaranteed by simulation and characterization.
Rev. C | Page 4 of 20
ADA4627-1/ADA4637-1 ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Supply Voltage Input Voltage Range1 Input Current1 Differential Input Voltage2 Output Short-Circuit Duration to GND Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature (Soldering, 60 sec) ESD Human Body Model
1
THERMAL RESISTANCE
Rating 36 V (V-) - 0.3 V to (V+) + 0.3 V 10 mA VSY Indefinite -65C to +150C -40C to +125C -65C to +150C 300C 4 kV
JA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. This was measured using a standard 2-layer board. For the LFCSP package, the exposed pad should be soldered to a copper plane. Table 4. Thermal Resistance
Package Type 8-Lead SOIC_N (R-8) 8-Lead LFCSP (CP-8-2) JA 155 77 JC 45 14 Unit C/W C/W
ESD CAUTION
Input pin has clamp diodes to the power supply pins. Input current should be limited to 10 mA or less whenever input signals exceed the power supply rail by 0.3 V. 2 Differential input voltage is limited to 30 V or the supply voltage, whichever is less.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Rev. C | Page 5 of 20
ADA4627-1/ADA4637-1 TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25C, unless otherwise noted.
100
120 100
VOLTAGE NOISE DENSITY (nV/Hz)
GAIN (dB) AND PHASE (Degrees)
80 60 40 20 0 -20 -40 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M ADA4627-1 TA = 25C VSY = 15V 19.1MHz 78
10
ADA4627-1 TA = 25C VSY = 15V 0.1 1 FREQUENCY (kHz) 10
07559-003
Figure 4. Voltage Noise Density vs. Frequency
140 100
Figure 7. Open-Loop Gain and Phase vs. Frequency
RL = 1k
OPEN-LOOP GAIN (dB)
120
10 AV = -10
100
RL = 600
ZOUT ()
1
AV = -100
80 ADA4627-1 TA = 25C VSY = 15V VO = 11V
07559-004
0.1
AV = -1 ADA4627-1 TA = 25C VSY = 15V
-25
0
25 50 TEMPERATURE (C)
75
100
125
1k
10k
100k 1M FREQUENCY (Hz)
10M
100M
Figure 5. Open-Loop Gain vs. Temperature
120
150
Figure 8. Closed-Loop ZOUT vs. Frequency
100
100
80
50
CMRR (dB)
VOS (V)
60
0
40
-50 ADA4627-1 TA = 25C VSY = 15V
20
07559-010
0 100
1k
10k 100k FREQUENCY (Hz)
1M
10M
-150 -15
-10
-5
0 VCM (V)
5
10
15
Figure 6. CMRR vs. Frequency
Figure 9. VOS vs. Common-Mode Voltage
Rev. C | Page 6 of 20
07559-069
ADA4627-1 TA = 25C VSY = 15V
-100
07559-007
60 -50
0.01 100
07559-006
1 0.01
ADA4627-1/ADA4637-1
120
120
100
COMMON-MODE REJECTION RATIO (dB)
110
80
100
PSRR (dB)
60 PSRR- 40 ADA4627-1 TA = 25C VSY = 15V
07559-009
90
PSRR+
80 ADA4627-1 VSY = 15V VCM = 11.5V -25 0 25 50 75 100 125
07559-012
20
70
0 100
1k
10k
100k
1M
10M
60 -50
FREQUENCY (Hz)
TEMPERATURE (C)
Figure 10. PSRR vs. Frequency
8 -40C 7 6 5 4 3 2 ADA4627-1 1 0 0 4 8 12 16 20 24 SUPPLY VOLTAGE (V) 28 32 36 +25C +85C +125C
Figure 13. CMRR vs. Temperature
20 ADA4627-1 TA = 25C VSY = 15V 10
SUPPLY CURRENT (mA)
VOL - VSS (V)
07559-011
1 0.001
0.01
0.1 1 ILOAD (mA)
10
100
Figure 11. Supply Current vs. Supply Voltage and Temperature
120 20
Figure 14. VOUT Sinking vs. ILOAD Current
ADA4627-1 TA = 25C VSY = 15V 10
110
07559-068
100 -40
-20
0
20 40 60 TEMPERATURE (C)
80
100
120
1 0.001
0.01
0.1 1 ILOAD (mA)
10
100
Figure 12. PSRR vs. Temperature
Figure 15. VOUT Sourcing vs. ILOAD Current
Rev. C | Page 7 of 20
07559-057
ADA4627-1 RL = 4.5V < VSY < 18V
VDD - VOH (V)
PSRR (dB)
07559-058
ADA4627-1/ADA4637-1
8 7 6
0.001 0.01 ADA4627-1 TA = 25C VSY = 15V VIN = 810mV RL = 600 80kHz FILTER
SUPPLY CURRENT (mA)
4 3
THD + N (%)
0.0001
5
2
07559-071
1 0 0 4
ADA4627-1 TA = 25C SOIC PACKAGE
07559-015
8
12
16
20
24
28
32
36
0.00001 0.01
0.1
SUPPLY VOLTAGE (V)
1 FREQUENCY (kHz)
10
Figure 16. Supply Current vs. Supply Voltage
10,000
Figure 19. THD + N vs. Frequency
0.1
ADA4627-1 VSY = 15V 1,000 0.01 MEASURED
THD + N (%)
100 0.001
IB (pA)
10 ADA4627-1 TA = 25C VSY = 15V VIN = 1kHz RL = 600 80kHz FILTER
0.0001
EXTRAPOLATED 1
07559-072
07559-078
y = 0.28950.0647x R2 = 0.9991 0.1 10 30 50 70 90 TEMPERATURE (C) 110
0.00001 0.001
0.01 0.1 AMPLITUDE (V rms)
1
130
Figure 17. THD + N vs. VIN
60 50 40 AV = +100 ADA4627-1 TA = 25C VSY = 15V
100 75
Figure 20. Input Bias Current vs. Temperature
IB+ +85C IB-
50 25
GAIN (dB)
30 20 AV = +10 10 0 AV = +1
07559-070
IB (pA)
+25C 0
IB+ IB-
-25 -50
07559-073
-10 -20 10 100 1k 10k 100k FREQUENCY (kHz) 1M 10M
-75 -100 -15
ADA4627-1 VSY = 15V
100M
-10
-5
0 VCM (V)
5
10
15
Figure 18. Closed-Loop Gain vs. Frequency
Figure 21. Input Bias Current vs. VCM and Temperature
Rev. C | Page 8 of 20
ADA4627-1/ADA4637-1
1200 1100 1000 900 800
IB (pA)
700 600 500 400 300 200 100 0 -15 -10 -5 0 VCM (V) 5 ADA4627-1 TA = 125C VSY = 15V
IB-
OUTPUT VOLTAGE (5V/DIV)
IB+
1
07559-074
10
15
TIME (1s/DIV)
Figure 22. Input Bias Current vs. VCM at 125C
80 60 40 20 ADA4627-1 TA = 25C VSY = 15V
Figure 25. Large Signal Transient Response
OUTPUT VOLTAGE (5V/DIV)
ADA4627-1 TA = 25C AV = +1 VIN = 20V p-p RF = 0
VOS (V)
0 -20 -40 -60 -80
0 60 120 180 TIME (Seconds) 240 300
1
07559-075
TIME (200ns/DIV)
Figure 23. Input Offset Voltage vs. Time
60
Figure 26. Large Signal Transient Response
50
OVERSHOOT (%)
40 OS+
OUTPUT VOLTAGE (5V/DIV)
OS-
ADA4627-1 TA = 25C AV = -1 VIN = 20V p-p RF = RIN = 2k
30
1
20
10
0 1 10 100 1000 LOAD CAPACITANCE (pF)
07559-023
10,000
CH1 5.00V
TIME (200ns/DIV)
Figure 24. Small Signal Overshoot vs. Load Capacitance
Figure 27. Large Signal Transient Response
Rev. C | Page 9 of 20
07559-059
ADA4627-1 TA = 25C VSY = 15V AV = +1 VIN = 100mV p-p
07559-062
07559-061
ADA4627-1 TA = 25C AV = -1 VIN = 20V p-p RF = RIN = 2k CF = 10pF RL = 1k CL = 1nF
ADA4627-1/ADA4637-1
OUTPUT VOLTAGE (50mV/DIV)
OUTPUT VOLTAGE (5V/DIV)
1
1
07559-063
TIME (1s/DIV)
TIME (200ns/DIV)
Figure 28. Large Signal Transient Response
Figure 31. Small Signal Transient Response
1
OUTPUT VOLTAGE (50mV/DIV)
OUTPUT VOLTAGE (5V/DIV)
ADA4627-1 TA = 25C AV = -1 VIN = 20V p-p RF = RIN = 2k CF = 10pF RL = 1k CL = 100pF
1
07559-060
TIME (200ns/DIV)
TIME (200ns/DIV)
Figure 29. Large Signal Transient Response
Figure 32. Small Signal Transient Response
OUTPUT VOLTAGE (50mV/DIV)
1
OUTPUT VOLTAGE (50mV/DIV)
1
ADA4627-1 TA = 25C AV = +1 VIN = 200mV p-p RF = 0
07559-064
TIME (200ns/DIV)
TIME (200ns/DIV)
Figure 30. Small Signal Transient Response
Figure 33. Small Signal Transient Response
Rev. C | Page 10 of 20
07559-067
ADA4627-1 TA = 25C AV = -1 VIN = 200mV p-p RF = RIN = 2k CF = 5pF RL = 1k CL = 100pF
07559-065
ADA4627-1 TA = 25C AV = +1 VIN = 200mV p-p RF = 0 RL = 1k CL = 1nF
07559-066
ADA4627-1 TA = 25C AV = +1 VIN = 20V p-p RF = 0 RL = 1k CL = 1nF
ADA4627-1 TA = 25C AV = -1 VIN = 200mV p-p RF = RIN = 2k CF = 5pF
ADA4627-1/ADA4637-1
20 15 10 ADA4627-1 TA = 25C VSY = 15V
ADA4627-1 TA = 25C VSY = 15
1
5 0 -5 VOUT -10 -15 VIN 0 0.5 1.0 1.5 2.0 TIME (ms) 2.5 3.0 3.5 4.0
07559-033
2
VOUT
VIN
OUTPUT VOLTAGE (1mV/DIV)
07559-040
INPUT VOLTAGE (5V/DIV)
AMPLITUDE (V)
-20
TIME (200ns/DIV)
Figure 34. No Phase Reversal
ADA4627-1 TA = 25C VSY = 15
Figure 37. Positive Settling Time to 0.01%
VIN
2
OUTPUT VOLTAGE (200mV/DIV)
1
OUTPUT VOLTAGE (1mV/DIV)
INPUT VOLTAGE (5V/DIV)
VOUT
1
TIME (200ns/DIV)
07559-076
ADA4627-1 TA = 25C VSY = 15V DUT GAIN = 100 4TH ORDER BAND PASS FIXTURE GAIN = 10k TOTAL GAIN = 1M TIME (1s/DIV)
Figure 35. Negative Settling Time to 0.01%
140 120 100
Figure 38. 0.1 Hz to 10 Hz Noise
GAIN (dB) AND PHASE (Degrees)
100 80 60 40 20 0 -20 -40 -60 -80 ADA4637-1 VSY = 15V TA = 25C AV = -4 RIN = 500 RF = 2k CF = 4.8pF CL = 35pF GAIN
PHASE 80
CMRR (dB)
60
40
20 ADA4637-1 VSY = 15V TA = 25C
07559-082
100k
1M
10M
100M
100
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 36. Open-Loop Gain and Phase vs. Frequency
Figure 39. CMRR vs. Frequency
Rev. C | Page 11 of 20
07559-083
-100 10k
0 10
07559-077
ADA4627-1/ADA4637-1
120 PSRR+
ADA4637-1 TA = 25C AV = +5 VSY = 15V RIN = 500 RF = 2k CF = 4.8pF CL = 50pF
PSRR- 80
60
40 ADA4637-1 VSY = 15V AV = +5 TA = 25C
07559-081
0 10
100
1k
10k
100k
1M
10M
100M
TIME (200ns/DIV)
FREQUENCY (Hz)
Figure 40. PSRR vs. Frequency
50 AV = +100 40
Figure 43. Small Signal Transient Response
ADA4637-1 TA = 25C AV = -4 VSY = 15V RIN = 500 RF = 2k CF = 4.8pF
30
GAIN (dB)
AV = +10 20
10 ADA4637-1 VSY = 15V RF = 1k, CF = 4.8pF TA = 25C
1k 10k 100k
AV = +5
1M
10M
100M
FREQUENCY (Hz)
07559-079
-10 100
TIME (100ns/DIV)
Figure 41. Closed-Loop Gain vs. Frequency
ADA4637-1 TA = 25C AV = +5 VSY = 15V RIN = 500 RF = 2k CF = 3pF
Figure 44. Slew Rate Falling
ADA4637-1 TA = 25C AV = -4 VSY = 15V RIN = 500 RF = 2k CF = 4.8pF
OUTPUT VOLTAGE (5V/DIV)
OUTPUT VOLTAGE (5V/DIV)
07559-084
TIME (200ns/DIV)
TIME (100ns/DIV)
Figure 42. Large Signal Transient Response
Figure 45. Slew Rate Rising
Rev. C | Page 12 of 20
07559-087
07559-086
0
OUTPUT VOLTAGE (5V/DIV)
07559-085
20
OUTPUT VOLTAGE (100mV/DIV)
100
PSRR (dB)
ADA4627-1/ADA4637-1
100 ADA4637-1 VSY = 15V VCM = 0V TA = 25C
VOLTAGE NOISE DENSITY (nV/Hz)
10
1
10
100
1k
10k
100k
FREQUENCY (Hz)
Figure 46. Voltage Noise Density vs. Frequency
07559-080
1
Rev. C | Page 13 of 20
ADA4627-1/ADA4637-1 THEORY OF OPERATION
The ADA4627-1 is a high speed, unity gain stable amplifier with excellent dc characteristics. The ADA4637-1 is a decompensated version that is stable at a gain of 5 or greater. The typical offset voltage of 70 V allows the amplifiers to be easily configured for high gains without the risk of excessive output voltage errors. The small temperature drift of 2 V/C ensures a minimum offset voltage error over the entire temperature range of -40C to +125C, making the amplifiers ideal for a variety of sensitive measurement applications in harsh operating environments. use the offset adjust pins, especially for offset adjust of a complete signal chain. Signal chain offset can be addressed with an auto-zero amplifier used to form a composite amplifier; or, if the ADA4627-1 or the ADA4637-1 is in an inverting amplifier stage, it can be modified easily to add a potentiometer (see Figure 48). The LFCSP package does not have offset adjust pins.
RF
RIN
2
INPUT VOLTAGE RANGE
The ADA4627-1/ADA4637-1 are not rail-to-rail input amplifiers; therefore, care is required to ensure that both inputs do not exceed the input voltage range. Under normal negative feedback operating conditions, the amplifier corrects its output to ensure that the two inputs are at the same voltage. However, if either input exceeds the input voltage range, the loop opens, and large currents begin to flow through the ESD protection diodes in the amplifier. These diodes are connected between the inputs and each supply rail to protect the input transistors against an electrostatic discharge event, and they are normally reverse-biased. However, if the input voltage exceeds the supply voltage, these ESD diodes can become forward-biased. Without current limiting, excessive amounts of current can flow through these diodes, causing permanent damage to the device. If inputs are subject to overvoltage, insert appropriate series resistors to limit the diode current to less than 5 mA.
+ VIN -
ADA4627-1
3
6
+ VOUT -
+VS 499k 0.1F -VS 100k
07559-052
499k 200
Figure 48. Alternate Offset Null Circuit for Inverting Stage
INPUT BIAS CURRENT
Because the ADA4627-1/ADA4637-1 have a JFET input stage, the input bias current, due to the reverse-biased junction, has a leakage current that approximately doubles every 10C. The power dissipation of the part, combined with the thermal resistance of the package, results in the junction temperature increasing up 20 degrees to 30 degrees Celsius above ambient. This parameter is tested with high speed ATE equipment, which does not result in the die temperature reaching equilibrium. This is correlated with bench measurements to match the guaranteed maximum at room temperature shown in Table 2. The input current can be reduced by keeping the temperature as low as possible and using a light load on the output.
INPUT OFFSET VOLTAGE ADJUST RANGE
The ADA4627-1/ADA4637-1 SOIC packages have offset adjust pins for compatibility with some existing designs. The recommended offset nulling circuit is shown in Figure 47.
+VS
NOISE CONSIDERATIONS
The JFET input stage offers very low input voltage noise and input current noise. The thermal noise of a 1 k resistor at room temperature is 4 nV/Hz; therefore, low values of resistance should be used for dc-coupled inverting and noninverting amplifier configurations. In the case of transimpedance amplifiers (TIAs), current noise is more important. The ADA4627-1/ADA4637-1 are an excellent choice for both of these applications. Analog Devices offers a wide variety of low voltage noise and low current noise op amps in a variety of processes that are optimized for different supply voltage ranges. Refer to Application Note AN-940 for a discussion of noise, calculations, and selection tables for more than three dozen low noise, op amp families.
7 1 2
100k
5
ADA4627-1
3 4
6
-VS
Figure 47. Standard Offset Null Circuit
With a 100 k potentiometer, the adjustment range is more than 11 mV. However, the VOS temperature drift increases by several V/C for every millivolt of offset adjust. The ADA4627-1/ADA4637-1 have matching thin film resistors that are laser trimmed at two temperatures to minimize both offset voltage and offset voltage drift. The offset voltage at room temperature is less than 0.5 mV, and the offset voltage drift is only a few V/C or less; therefore, it is not recommended to
07559-051
Rev. C | Page 14 of 20
ADA4627-1/ADA4637-1
THD + N MEASUREMENTS
Total harmonic distortion plus noise (THD + N) is usually measured with an audio analyzer, such as those from Audio Precision, IncTM. The analyzer consists of a low distortion oscillator that is swept from the starting frequency to the ending frequency. The oscillator is connected to the circuit under test, and the output of the circuit goes back to the analyzer. The analyzer has a tunable notch filter in lock step with the swept oscillator. This removes the fundamental frequency but allows all of the harmonics and wideband noise to be measured with an integrating voltmeter. However, there is a switchable low-pass filter in series with the notch filter. If the sine wave is at 100 Hz, then the tenth harmonic is still at 1 kHz; therefore, having a low pass at 80 kHz is not a problem. When the oscillator reaches 20 kHz, the fourth harmonic (80 kHz) is partially attenuated, resulting in a lower reading from the voltmeter. When evaluating THD + N curves from any manufacturer, careful attention should be paid to the test conditions. The difference between an 80 kHz low-pass filter and a 500 kHz filter is shown in Figure 49.
0.01 ADA4627-1 TA = 25C VSY = 15V VIN = 810mV RL = 600 0.001
GUARD RF
2
CF
ADA4627-1
IN
3 8
6
+ VOUT -
07559-053
Figure 50. Inverting Amplifier with Guard
For a noninverting configuration, the trace can be driven from the feedback divider, but the resistors should be chosen to offer a low impedance drive to the trace (see Figure 51).
GUARD
3
+ VS -
2
ADA4627-1
8
6
VOUT + RF
-
Figure 51. Noninverting Amplifier with Guard
THD + N (%)
The board layout should be compact with traces as short as possible. For second-order board considerations, such as triboelectric effects and piezoelectric effects, as well as a table of insulating material properties, see the AD549 data sheet. In some cases, shielding from air currents may be helpful. A general rule of thumb, for op amps with gain bandwidth products higher than 1 MHz, bypass capacitors should be very close to the part, within 3 mm. Each supply should be bypassed with a 0.01 F ceramic capacitor in parallel with a 1 F bulk decoupling capacitor. The ceramic capacitors should be closer to the op amp. Sockets, which add inductance and capacitance, should not be used.
0.0001
500kHz FILTER
80kHz FILTER
07559-017
0.00001 0.01
0.1
1 FREQUENCY (kHz)
10
100
Figure 49. THD + N vs. Frequency
OUTPUT PHASE REVERSAL
Output phase reversal occurs in some amplifiers when the input common-mode voltage range is exceeded. As common-mode voltage is moved outside the common-mode range, the outputs of these amplifiers can suddenly jump in the opposite direction to the supply rail. This is the result of the differential input pair shutting down, causing a radical shifting of internal voltages that results in the erratic output behavior. The ADA4627-1/ADA4637-1 amplifiers have been carefully designed to prevent any output phase reversal if both inputs are maintained within the specified input voltage range. If one or both inputs exceed the input voltage range but remain within the supply rails, an internal loop opens and the output varies. Therefore, the inputs should always be a minimum of 3 V away from either supply rail.
PRINTED CIRCUIT BOARD LAYOUT, BIAS CURRENT, AND BYPASSING
To take advantage of the very low input bias current of the ADA4627-1/ADA4637-1 at room temperature, leakage paths must be considered. A printed circuit board (PCB), with dust and humidity, can have 100 M of resistance over a few tenths of an inch. A 1 mV differential between the two points results in 10 pA of leakage current, more than the guaranteed maximum. The op amp inputs should be guarded by surrounding the nets with a metal trace maintained at the predicted voltage. In the case of an inverting configuration or transimpedance amplifier, (see Figure 50), the inverting and noninverting nodes can be surrounded by traces held at a quiet analog ground.
Rev. C | Page 15 of 20
07559-054
RI
ADA4627-1/ADA4637-1
DECOMPENSATED OP AMPS
The ADA4637-1 is a decompensated op amp, and, as such, must always be operated at a noise gain of 5 or greater. See tutorial MT-033, "Voltage Feedback Op Amp Gain and Bandwidth", at www.analog.com for more information. or oscillation. The ADA4627-1/ADA4637-1 have a high phase margin and low output impedance, so they can drive reasonable values of capacitance. This is a common situation when an amplifier is used to drive the input of switched capacitor ADCs. For other considerations and various circuit solutions, see the Analog Dialogue article titled Ask the Applications Engineer-25, Op Amps Driving Capacitive Loads, available at www.analog.com.
DRIVING CAPACITIVE LOADS
Adding capacitance to the output of any op amp results in additional phase shift, which reduces stability and leads to overshoot
Rev. C | Page 16 of 20
ADA4627-1/ADA4637-1 OUTLINE DIMENSIONS
3.25 3.00 SQ 2.75 0.60 MAX 0.60 MAX
5 8
0.50 BSC
PIN 1 INDICATOR
TOP VIEW
2.95 2.75 SQ 2.55
EXPOSED PAD
(BOTTOM VIEW)
1.60 1.45 1.30 PIN 1 INDICATOR
4
1
12 MAX 0.90 MAX 0.85 NOM SEATING PLANE
0.70 MAX 0.65 TYP
0.50 0.40 0.30 0.05 MAX 0.01 NOM
1.89 1.74 1.59
Figure 52. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 3 mm x 3 mm Body, Very Thin, Dual Lead (CP-8-2) Dimensions shown in millimeters
5.00 (0.1968) 4.80 (0.1890)
8
5 4
4.00 (0.1574) 3.80 (0.1497)
1
6.20 (0.2441) 5.80 (0.2284)
1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE
1.75 (0.0688) 1.35 (0.0532)
0.50 (0.0196) 0.25 (0.0099) 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157)
45
0.51 (0.0201) 0.31 (0.0122)
COMPLIANT TO JEDEC STANDARDS MS-012-A A CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 53. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches)
Rev. C | Page 17 of 20
012407-A
090308-B
0.30 0.23 0.18
0.20 REF
FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION SECTION OF THIS DATA SHEET.
ADA4627-1/ADA4637-1
ORDERING GUIDE
Model1 ADA4627-1ACPZ-R2 ADA4627-1ACPZ-RL ADA4627-1ACPZ-R7 ADA4627-1ARZ ADA4627-1ARZ-RL ADA4627-1ARZ-R7 ADA4627-1BRZ ADA4627-1BRZ-R7 ADA4627-1BRZ-RL ADA4637-1ARZ ADA4637-1ARZ-RL ADA4637-1ARZ-R7 ADA4637-1BRZ ADA4637-1BRZ-R7 ADA4637-1BRZ-RL
1
Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C
Package Description 8-Lead LFCSP_VD 8-Lead LFCSP_VD 8-Lead LFCSP_VD 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N
Package Option CP-8-2 CP-8-2 CP-8-2 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8
Branding A29 A29 A29
Z = RoHS Compliant Part.
Rev. C | Page 18 of 20
ADA4627-1/ADA4637-1 NOTES
Rev. C | Page 19 of 20
ADA4627-1/ADA4637-1 NOTES
(c)2009-2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07559-0-7/10(C)
Rev. C | Page 20 of 20

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